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- W2007478450 abstract "We present a bit-parallel squarer for GF(2n) defined by an irreducible trinomial xn + xk + 1 using a shifted polynomial basis. The proposed squarer requires TX delay and at most ⌈n/2⌉ XOR gates, where TX is the delay of one XOR gate. As a result, the squarer using the shifted polynomial basis is more efficient than one using the polynomial basis except for k = 1 or n/2." @default.
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- W2007478450 date "2006-09-01" @default.
- W2007478450 modified "2023-09-27" @default.
- W2007478450 title "Low Complexity Bit-Parallel Squarer for GF(2n) Defined by Irreducible Trinomials" @default.
- W2007478450 doi "https://doi.org/10.1093/ietfec/e89-a.9.2451" @default.
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