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- W2010266312 abstract "This paper presents a compact fully differential amplifier with a rail-to-rail input stage and a class AB output stage. A new biasing scheme for a complementary rail-to-rail input stage with constant g/sub m/ is introduced. The proposed biasing scheme uses a current regulating loop to keep the sum of the biasing currents of the complementary input pairs constant. This results in a g/sub m/-variation below 4% for input pairs operating in weak inversion. In a standard 0.7 /spl mu/m CMOS technology the circuit can handle power supply voltages ranging from 1.5 V up to 3.3 V. For a power consumption of 300 /spl mu/W and a load capacitance of 15 pF a gainbandwidth (GBW) of 4.3 MHz is achieved. This results in a GBWCL-to-supply-power ratio of 210 MHz/spl middot/pF/mW. The total die area of the amplifier is 0.25 mm/sup 2/." @default.
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- W2010266312 date "2002-11-22" @default.
- W2010266312 modified "2023-09-23" @default.
- W2010266312 title "A fully differential 1.5 V low-power CMOS operational amplifier with a rail-to-rail current-regulated constant-g/sub m/ input stage" @default.
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- W2010266312 doi "https://doi.org/10.1109/cicc.1997.606588" @default.
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