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- W2010449580 abstract "We present a standard pipelined ADC design using Nauta structure differential op-amps as an alternative to traditional analog op-amps. The six stage pipelined ADC is capable of running at 100MS/s and achieves 8 bit resolution under simulations. The research is focused on the path to scaling to deep sub-micron CMOS and finding alternatives to the reduced gain and low output voltage swing of traditional analog op-amp designs. The Nauta structure op-amp allows us to produce one of the smallest reported areas for a 180nm pipelined ADC occupying only 0.3mm2 for a 10 bit 100MS/s pipelined ADC." @default.
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- W2010449580 date "2013-05-01" @default.
- W2010449580 modified "2023-09-28" @default.
- W2010449580 title "A 0.3mm<sup>2</sup> 10-b 100MS/s pipelined ADC using Nauta structure op-amps in 180nm CMOS" @default.
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- W2010449580 doi "https://doi.org/10.1109/iscas.2013.6572222" @default.
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