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- W201128307 abstract "This paper describes a high-voltage IC technology. Various novel lateral high-voltage device concepts, which can be efficiently implemented in a submicron CMOS process, are explained and analyzed. It’s essential for lateral high-voltage devices to show best trade-off between specific on-resistance R sp and breakdown voltage BV, and super-junction devices give an opportunity to achieve a best R sp -BV trade-off for BV over 100V. Key issues for monolithic integration of high-voltage devices and low-voltage CMOS are reviewed in the paper. Finally, hot-carrier (HC) behaviour of a high-voltage 0.35μm lateral DMOS transistor (LDMOSFET) is presented. It is shown that self-heating effects during HC stress have to be taken into account for the HC stress analysis. Together with TCAD simulations and measurements, one can clearly explain the self-heating effects on the HC behaviour of an LDMOSFET." @default.
- W201128307 created "2016-06-24" @default.
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- W201128307 date "2008-10-13" @default.
- W201128307 modified "2023-10-18" @default.
- W201128307 title "High-Voltage IC Technology: Implemented in a Standard Submicron CMOS Process" @default.
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- W201128307 doi "https://doi.org/10.1007/978-3-540-85190-5_40" @default.
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