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- W2012584989 abstract "With the growing density and shrinking feature size of modern semiconductors, it is increasingly difficult to manufacture defect free semiconductors that maintain acceptable levels of reliability for long periods of time. These systems are increasingly susceptible to wear-out by failing to meet their operational specifications for an extended period of time. The reconfigurability of FPGAs can be used to post-manufacturing faults by configuring the FPGA to avoid a damaged resource. This paper presents a method for repairing FPGA devices with wear-out faults by precomputing a set of circuits that, collectively, can a fault found in any logic block of the FPGA. This approach relies on logic placement to create repair circuits that avoid specific logic blocks. Three placement algorithms will be presented that generate a complete set of designs during the conventional placement process. The number of repairs needed to create a complete set depends heavily on the utilization of the FPGA resources. The three algorithms are tested against several benchmarks and with multiple area constraints for each benchmark. The best placement approach described in the paper generates a full set of circuits at a computation cost of 16X that of a conventional placer and with circuits of comparable quality." @default.
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- W2012584989 date "2013-02-11" @default.
- W2012584989 modified "2023-09-27" @default.
- W2012584989 title "Placement of repair circuits for in-field FPGA repair" @default.
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- W2012584989 doi "https://doi.org/10.1145/2435264.2435286" @default.
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