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- W2012839453 abstract "In this work, we propose a Programmable Vector Memory Controller (PVMC), which boosts noncontiguous vector data accesses by integrating descriptors of memory patterns, a specialized local memory, a memory manager in hardware, and multiple DRAM controllers. We implemented and validated the proposed system on an Altera DE4 FPGA board. We compare the performance of our proposal with a vector system without PVMC as well as a scalar only system. When compared with a baseline vector system, the results show that the PVMC system transfers data sets up to 2.2× to 14.9× faster, achieves between 2.16× to 3.18× of speedup for 5 applications and consumes 2.56 to 4.04 times less energy." @default.
- W2012839453 created "2016-06-24" @default.
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- W2012839453 date "2014-06-01" @default.
- W2012839453 modified "2023-10-03" @default.
- W2012839453 title "PVMC: Programmable Vector Memory Controller" @default.
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- W2012839453 doi "https://doi.org/10.1109/asap.2014.6868668" @default.
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