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- W2013465013 abstract "The implementation of different well-known scheduling schemes using a cell sequencer/scheduler circuit, already proposed by the authors, is investigated. Two groups of scheduling schemes, namely priority-based and rate-based schemes are considered. The first group includes static and dynamic priority schemes such as head-of-line priority and windowed priority schemes. The second group includes fair queueing, self-clocked fair queueing, and pacing mechanisms. The application of the sequencer in shaping and policing circuits in ATM networks is also addressed. A mechanism of scheduling real-time and non-real-time traffics using two different algorithms but a common sequencer is also presented to demonstrate the capability of the sequencer to implement a combination of algorithms and functions in the same environment." @default.
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- W2013465013 date "1997-10-06" @default.
- W2013465013 modified "2023-09-23" @default.
- W2013465013 title "<title>Implementation of scheduling schemes using a sequencer circuit</title>" @default.
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- W2013465013 doi "https://doi.org/10.1117/12.290470" @default.
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