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- W2013786280 abstract "In this paper, we present a compact single-piece and complete drain current model for submicron stacked-gate flash memory cells. The physics-based and analytical model was developed using the drift-diffusion equation and based on the quasi-two-dimensional Poisson equation. The important short-channel device features: drain-capacitance coupling, drain-induced-barrier lowering, channel-length modulation, velocity saturation, and the parasitic series source and drain resistances have been included in the model in a physically consistent manner. This model is smoothly continuous, valid in all regions of operation and suitable for efficient circuit simulation. The accuracy of the model has been checked by comparing the calculated drain currents with the experimental and the two-dimensional stimulated data." @default.
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- W2013786280 date "2000-08-01" @default.
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- W2013786280 title "A compact drain-current model for stacked-gate flash memory cells" @default.
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- W2013786280 doi "https://doi.org/10.1016/s0038-1101(00)00069-1" @default.
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