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- W2014417992 abstract "A new ESD protection methodology for high-frequency CMOS LNAs is introduced. An on-chip inductor is employed to drain off the hazardous ESD charge while tuning out the harmful parasitic input capacitance. A 5.2 GHz LNA has been designed, attaining high RF performance while providing a high level of ESD protection." @default.
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- W2014417992 date "2001-01-01" @default.
- W2014417992 modified "2023-10-17" @default.
- W2014417992 title "High-performance 5.2 GHz LNA with on-chip inductor to provide ESD protection" @default.
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- W2014417992 doi "https://doi.org/10.1049/el:20010271" @default.
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