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- W2014422307 abstract "An analytical model for bit-line coupling noise in various DRAM architectures has been developed. The analytical expressions developed provide insight into the charge redistribution when the word lines turn on. They are also useful for determining the noise-to-signal ratio and for designing the sense amplifier circuit. Noise extracted from SPICE circuit simulation is included and is compared against the results from the present analytical model. Good agreement is found." @default.
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- W2014422307 date "1993-02-01" @default.
- W2014422307 modified "2023-09-26" @default.
- W2014422307 title "Array noise analysis for multi-megabit DRAM design" @default.
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- W2014422307 doi "https://doi.org/10.1080/00207219308925833" @default.
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