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• W2014536142 abstract "We report on a lateral interband tunneling transistor, where the source and drain form a heavily doped lateral pn junction in a thin Si film on a silicon-on-insulator (SOI) substrate. The transistor action results from the control of the reverse-bias tunneling breakdown under drain bias VD by a gate voltage VG. We observe gate control over tunneling drain current ID at both polarities of VG with negligible gate leakage. Systematic ID(VG,VD) measurements, together with numerical device simulations, show that in first approximation ID depends on the maximum junction electric field Fmax(VG,VD). Excellent performance is hence predicted in devices with more abrupt junctions and thinner SOI films. The device does not have an inversion channel and is not subject to scaling rules of standard Si transistors." @default.
• W2014536142 created "2016-06-24" @default.
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• W2014536142 date "2004-03-02" @default.
• W2014536142 modified "2023-10-10" @default.
• W2014536142 title "Lateral interband tunneling transistor in silicon-on-insulator" @default.
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• W2014536142 doi "https://doi.org/10.1063/1.1668321" @default.
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