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- W2015864328 abstract "A methodology for synthesizing parallel computational structures has been applied to the Discrete Wavelet Transform algorithm. It is based on linear space-time mapping with constraint driven localization. The data dependence analysis, localization of global variables, and space-time mapping is presented, as well as one realization of a 3-octave systolic array. The DWT algorithm may not be described by a set of Uniform or Affine Recurrence Equations (UREs, AREs), thus it may not be efficiently mapped onto a regular array. However it is still possible to map the DWT algorithm to a systolic array with local communication links by using first a non-linear index space transformation. The array derived here has latency of 3M/2, where M is the input sequence length, and similar area requirements as solutions proposed elsewhere. In the general case of an arbitrary number of octaves, linear space-time mapping leads to inefficient arrays of long latency due to problems associated with multiprojection.© (1994) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only." @default.
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- W2015864328 date "1994-10-11" @default.
- W2015864328 modified "2023-10-03" @default.
- W2015864328 title "<title>Synthesis of regular very large scale integration (VLSI) architectures for the 1D discrete wavelet transform</title>" @default.
- W2015864328 doi "https://doi.org/10.1117/12.188779" @default.
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