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- W2016104905 abstract "Most of the microelectronics components developed for the first generation of LHC experiments have been defined and designed with very precise experiment-specific goals and are fully optimized for these applications. In an effort to cover the needs for generic programmable components, often needed in the real world, an industry-compatible Programmable Logic Device (PLD) and an industry-compatible Field-Programmable Gate Array (FPGA) are now under development. This effort is targeted to small volume applications or to the cases where small programmable functions are required to fix a system application. The PLD is a fuse-based, 10-input, 8-I/O general architecture device compatible with a popular commercial part, and is fabricated in 0.25 μm CMOS. The FPGA under development is instead a 32 × 32 logic block array, equivalent to ≈ 25k gates, to be fabricated in 0.13 μm CMOS. The work focusses on the design of SEU-robust registers which can be employed for configuration storage as well as for user data flip-flops. The SEU-robust registers were tested in a heavy-ion beam facility; test results are presented." @default.
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- W2016104905 date "2007-09-24" @default.
- W2016104905 modified "2023-09-25" @default.
- W2016104905 title "Development of SEU-robust, radiation-tolerant and industry-compatible programmable logic components" @default.
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- W2016104905 doi "https://doi.org/10.1088/1748-0221/2/09/p09009" @default.
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