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- W2016284960 abstract "P-column junction field-effect transistors (FET's) have been fabricated in semi-insulating InP utilizing an all-implanted planar technology. A periodic array of p+ columns implanted through an n-type channel layer is used to form the active region. Initial devices with nominal gate lengths of 4 µm exhibit a unity-power-gain frequency <tex xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>f_{max}</tex> as high as 7 GHz while recent smaller gate length devices (nominally 1.7µm) show an <tex xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>f_{max}</tex> of 16 GHz." @default.
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- W2016284960 date "1986-06-01" @default.
- W2016284960 modified "2023-09-24" @default.
- W2016284960 title "Fully implanted p-column InP field-effect transistor" @default.
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- W2016284960 doi "https://doi.org/10.1109/edl.1986.26409" @default.
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