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• W2016588894 abstract "Novel high-speed low-power pulse-based flip-flops having a pulse generator controlled by scan input and scan enable signals are presented. The proposed scheme enables the reduction of data-to-output delay by elimination of the MUX-scan logic from the setup time path of flip-flop, at the cost of a small power overhead. The comparison results using the 45 nm CMOS process indicate that the worst-case DQ delay of the proposed flip-flop is reduced by up to 59% while the energy-delay product is improved by up to 80% compared to the conventional master-slave flip-flop. The silicon results show that the new flip-flops function properly down to 0.62 V." @default.
• W2016588894 created "2016-06-24" @default.
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• W2016588894 date "2013-05-01" @default.
• W2016588894 modified "2023-09-26" @default.
• W2016588894 title "Scan-controlled pulse flip-flops for mobile application processors" @default.
• W2016588894 cites W1488567546 @default.
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• W2016588894 doi "https://doi.org/10.1109/iscas.2013.6571960" @default.
• W2016588894 hasPublicationYear "2013" @default.
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