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- W2017809648 abstract "This paper presents a programmable System-On-a-chip for various embedded applications that need Neural Network computations. The system is fully implemented into Field-Programmable Gate Array (FPGA) based prototyping platform. The SoC consists of an embedded processor core and a reconfigurable hardware accelerator for neural computations. The performance of the SoC is evaluated using real image processing applications, such as optical character recognition (OCR) system." @default.
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- W2017809648 date "2013-01-07" @default.
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- W2017809648 title "A Multi-Layer Perceptron SoC for Smart Devices" @default.
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- W2017809648 doi "https://doi.org/10.5923/j.computer.20120207.02" @default.
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