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- W2018094038 abstract "The commitment of microprocessor-based system configurations to detailed logic design and breadboard fabrication traditionally results in a costly development cycle. This paper reports on the use of a computer design high-order-language (HOL) to simulate micro-computer functional elements, “macromodules”, at the register level, and verify the timing and interface requirements for a family of microcomputer configurations. The definitions of these microcomputer macromodules (i. e., microprocessors, memories, and input-output interface modules) was the outcome of requirements derived through previous system analyses and simulation work, reported in References 1 through 5, sponsored by the Office of Naval Research.Of the several choices of computer architecture simulation/emulation methods available (References 6 through 11), the technique adopted provided the necessary level of simulation required to verify the timing, interface and data flow within and between macromodules in the family, for subsequent system performance simulations.Further, the discrete logic, module-level simulation work described formed the necessary link between system design and ultimate hardware description for a low-cost, step-by-step design process. Writing and executing the module simulations provided a disciplined approach to hardware design, since all aspects of the components had to be implemented in order to follow and time the flow of data through any given microcomputer configuration. Lastly, since the language used was the most practical available language, its strengths and weaknesses were determined in the context of state-of-the-art LSI technology." @default.
- W2018094038 created "2016-06-24" @default.
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- W2018094038 date "1978-03-15" @default.
- W2018094038 modified "2023-09-27" @default.
- W2018094038 title "Simulating modular microcomputers" @default.
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- W2018094038 doi "https://doi.org/10.5555/800245.807339" @default.
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