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- W2018354759 abstract "A reconfigurable 65-nm continuous-time low-pass delta-sigma modulator operates with a sampling frequency from 491 MHz to 1536 MHz, a signal bandwidth from 10 MHz to 100 MHz, and a dynamic range of 75.4 dB to 62.8 dB, respectively. Flash ADC calibration and reference shuffling with zipper rotation are used to improve the linearity of the flash, while also increasing the highest sampling rate and bandwidth of the modulator. Dynamic element matching using a randomized incremented pointer improves the linearity of the DAC." @default.
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- W2018354759 date "2014-08-01" @default.
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- W2018354759 title "A Reconfigurable <formula formulatype=inline> <tex Notation=TeX>$DeltaSigma$</tex></formula> ADC With Up to 100 MHz Bandwidth Using Flash Reference Shuffling" @default.
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- W2018354759 doi "https://doi.org/10.1109/tcsi.2014.2333685" @default.
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