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• W2019141022 abstract "The slicing-tree representation had been proven to be very effective and efficient in optimizing floorplanning/placement and handling design/layout migration in modern system-on-chips (SoCs). However, none of the previous works introduced any symmetric-feasible condition in the slicing trees for analog device-level placement. This paper augments the slicing trees by introducing a new insertion operation and presents the symmetric-feasible conditions. Based on the augmented slicing trees and the symmetric-feasible conditions, various symmetric placements can be effectively explored during analog placement optimization." @default.
• W2019141022 created "2016-06-24" @default.
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• W2019141022 date "2012-09-01" @default.
• W2019141022 modified "2023-09-28" @default.
• W2019141022 title "Augmenting slicing trees for analog placement" @default.
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• W2019141022 doi "https://doi.org/10.1109/smacd.2012.6339416" @default.
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