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- W2019936863 abstract "FPGA designs often contain significant amounts of logic such as a board support package that remains unaltered throughout the design process. However, during normal operation, standard FPGA implementation tools re-implement the entire system, including the unchanged logic, adding to the turn around time of design iterations. Recently, FPGA implementation flows have appeared that allow preserving parts of a previously implemented design. In this study, we evaluate the potential speedups in implementation time achievable through preserving the unchanging portion of a design's implementation. We perform these evaluations using Xilinx Partitions, Xilinx SmartGuide, and the HMFlow rapid implementation tool." @default.
- W2019936863 created "2016-06-24" @default.
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- W2019936863 date "2013-09-01" @default.
- W2019936863 modified "2023-09-26" @default.
- W2019936863 title "Rapid FPGA design prototyping through preservation of system logic: A case study" @default.
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- W2019936863 doi "https://doi.org/10.1109/fpl.2013.6645539" @default.
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