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- W2020975095 abstract "The continuous increase of leakage power consumption in deep sub-micro technologies necessitates more aggressive leakage control. Runtime leakage control (RTLC) is effective, since runtime circuits generally have significant amount of idleness. However, current RTLC techniques are only used when circuits have long idleness, rendering the techniques less profitable. The reason is due to the large energy and delay overhead when performing RTLC mode transition. We propose two novel techniques, workload-adaptive V <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>th</sub> hopping (WAVTH) and hierarchical V <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>th</sub> hopping (HIVTH), to tackle the overhead problems and enable aggressive runtime leakage control. Experimental results show 19.2% average improvement on leakage saving with WAVTH and HIVTH over basic V <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>th</sub> hopping. The optimum design points of these two techniques are determined through accurate modeling." @default.
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- W2020975095 date "2010-01-01" @default.
- W2020975095 modified "2023-09-27" @default.
- W2020975095 title "Novel Vth Hopping Techniques for Aggressive Runtime Leakage Control" @default.
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- W2020975095 doi "https://doi.org/10.1109/vlsi.design.2010.86" @default.
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