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- W2023182092 abstract "As VLSI technology pushes toward micrometer range geometries, wafer flatness becomes critical to direct step on wafer projection printing. This paper describes a system that utilizes the automatic focusing capability of a wafer stepper to achieve in situ measurement of wafer flatness. A depth gauge attached to the lens column conveys to the system a voltage analog of column height during exposure of each die. The system then computes locations of isoplanar contour lines on the wafer and plots a topographic map on an X-Y recorder. Any vertical interval between contour lines can be specified between 0.5 and 2 micrometers. A close correlation has been found between interferometric images of wafer flatness and topographic maps produced by the system while attached to a wafer stepper. The chief advantage of the wafer topographic map over the interferometric image is its ability to capture flatness measurements during actual exposure. Also beneficial are tick marks on all contour lines which indicate direction of increasing wafer height. Application of the system will enhance prediction of photolithographic yield, identification of process steps causing wafer deformation and effectiveness of process quality control.© (1981) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only." @default.
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- W2023182092 date "1981-07-28" @default.
- W2023182092 modified "2023-09-27" @default.
- W2023182092 title "<title>Automated Wafer Flatness Characterization System</title>" @default.
- W2023182092 doi "https://doi.org/10.1117/12.931878" @default.
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