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• W2023196957 abstract "Modern embedded systems are based on Multiprocessor-Systems-on-Chip (MPSoCs) to meet the strict timing deadlines of multiple applications. MPSoC resources must be utilized efficiently by mapping the applications in throughput-aware manner in order to meet throughput constraints for each of them. A design-time methodology is applicable only to predefined set of applications with static behavior, which is incapable of handling dynamism in applications. On the other hand, a run-time approach can cater to the dynamism but cannot provide timing guarantees for all the applications due to large computation requirements at run-time. This paper presents a hybrid flow which performs compute intensive analysis at design-time to derive multiple resource-throughput trade-off points and selects one of these at run-time subject to available resources and desired throughput. Experimental results show that the design-time analysis is faster by 39%, provides better trade-off points and the run-time mapping is speeded up by 93% when compared to state-of-the-art techniques." @default.
• W2023196957 created "2016-06-24" @default.
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• W2023196957 date "2011-01-01" @default.
• W2023196957 modified "2023-09-26" @default.
• W2023196957 title "A hybrid strategy for mapping multiple throughput-constrained applications on MPSoCs" @default.
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• W2023196957 doi "https://doi.org/10.1145/2038698.2038726" @default.
• W2023196957 hasPublicationYear "2011" @default.
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