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- W2023395629 abstract "The linear model of phase locked loop which is proper for investigating of phase noise properties in the frequency domain is presented in this contribution. For simulation on PC analog-digital circuit analysis program Micro-Cap is used. Verification of the MC numerical simulations was done by MATLAB and measurements on the prototype were carried out. Based on numerical simulations results it is possible to verify basic theoretical relations and make a good PLL design. Using the mathematical analysis software MATLAB, along with the previous example, it will be possible to show how the various noise sources in a PLL can be modeled. A PSPICE noise macro models using the polynomial model of noise sources were tested successfully." @default.
- W2023395629 created "2016-06-24" @default.
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- W2023395629 date "2009-04-01" @default.
- W2023395629 modified "2023-10-10" @default.
- W2023395629 title "PLL phase-noise modeling by PC" @default.
- W2023395629 cites W2496208138 @default.
- W2023395629 doi "https://doi.org/10.1109/radioelek.2009.5158734" @default.
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