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- W2023495691 abstract "3-D stacking of dies results in high device density and high device speeds. One of the major challenges in die stacking is the proper dissipation of heat generated by the dies. Each die has a non-uniform powermap, which results in one or more hotspots on the die. The thermal challenge is made even worse by possible alignment of the hotspots when dies are stacked. To mitigate this issue, it is imperative that dies are placed such that the hot spots are as far away from each other as possible. This however, results in increased wirelengths within the stack and subsequently reduced performance. Thus, designing of a 3-D die stack involves solving a multi-objective optimization problem to simultaneously minimize both the temperature and wirelength in the stack. In this paper, this optimization problem is formulated for a special case of all dies being identical to each other, which is a realistic assumption especially for memory dies. The complete Pareto-optimal solution set is obtained for this problem, and the results show that certain Pareto-optimal solutions represent a much better trade-off in thermal and electrical performances as compared to the more intuitive single-objective solutions. The results also highlight the benefits of obtaining the entire Pareto-front and not just a few Pareto-optimal solutions." @default.
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- W2023495691 date "2008-12-01" @default.
- W2023495691 modified "2023-09-27" @default.
- W2023495691 title "Pareto-Optimal Die Orientations for 3-D Stacking of Identical Dies" @default.
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- W2023495691 doi "https://doi.org/10.1109/eptc.2008.4763433" @default.
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