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• W2023698859 endingPage "04CH03" @default.
• W2023698859 startingPage "04CH03" @default.
• W2023698859 abstract "(Bi,Pr)(Fe,Mn)O 3 (BPFM) thin films were deposited on SiO 2 /Si substrates by a chemical solution deposition method, resulting in the metal–ferroelectric–insulator–semiconductor (MFIS) capacitor structure. Polycrystalline BPFM films were grown on the substrate without impurity phases. Comparing with the capacitance vs voltage ( C – V ) curves of the MFIS capacitor structures with and without the BPFM self-barrier layer, the BPFM self-barrier layer suppress the formation of charge trap sites in the interface between the BPFM and SiO 2 layers of the present structure, resulting in the prepared MFIS capacitor structure showing a clockwise C – V hysteresis behavior due to remnant polarization of the BPFM layer. The memory window width in the C – V curve was approximately 0.5 V for the bias voltage sweep from -20 to +20 V." @default.
• W2023698859 created "2016-06-24" @default.
• W2023698859 creator A5006848190 @default.
• W2023698859 creator A5067331737 @default.
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• W2023698859 date "2013-02-20" @default.
• W2023698859 modified "2023-10-06" @default.
• W2023698859 title "Fabrication and Characterization of Metal–Ferroelectric–Insulator–Semiconductor Capacitor Structure with Ferroelectric (Bi,Pr)(Fe,Mn)O₃ Thin Films" @default.
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• W2023698859 doi "https://doi.org/10.7567/jjap.52.04ch03" @default.
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