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• W2031736658 abstract "A self-calibration method to calibrate the nonlinearity due to capacitance mismatch in successive approximation register (SAR) analog-to-digital converter (ADC) is presented. It focuses on calibrating the most significant bit (MSB) array in the split-capacitor main DAC (split-MDAC) by using a calibration DAC (CDAC) that contains multiple sub-CDACs. Every bit in MSB array has its corresponding sub-CDAC in CDAC, which enhances the calibration efficiency. To verify the calibration method, a 14 bit, 500kS/s SAR ADC is implemented, and it is manufactured in 0.35µm 2P4M CMOS process. The measured results show that the proposed calibration method can assist this SAR ADC to achieve better static and dynamic performance, and its ENOB is improved from 9 bit to 11.98 bit at Nyquist input frequency." @default.
• W2031736658 created "2016-06-24" @default.
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• W2031736658 date "2015-06-01" @default.
• W2031736658 modified "2023-10-06" @default.
• W2031736658 title "A self-calibration method for capacitance mismatch in SAR ADC with split-capacitor DAC" @default.
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• W2031736658 doi "https://doi.org/10.1016/j.mejo.2015.03.011" @default.
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