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- W2034105237 abstract "A 250-MHz, 16-b, fixed-point, super-high-speed video signal processor (S-VSP) ULSI has been developed for constructing a video teleconferencing system. Two major technologies have been developed. One is a high-speed large-capacity on-chip memory architecture that achieves both 250-MHz internal signal processing and 13.5-MHz input and output buffering. The other is a circuit technology that achieves 250-MHz operations with a convolver/multiplier, an arithmetic logic unit (ALU), an accumulator, and various kinds of static RAMs (SRAMs). A phase-locked loop (PLL) is also integrated to generate a 250-MHz internal clock. The S-VSP ULSI, which was fabricated with 0.8- mu m BiCMOS and triple-level-metallization technology, has a 15.5-mm*13.0-mm area and contains about 1.13 million transistors. It consumes 7 W at 250-MHz internal clock frequency with a single 5-V power supply.< <ETX xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>></ETX>" @default.
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- W2034105237 date "1991-01-01" @default.
- W2034105237 modified "2023-10-07" @default.
- W2034105237 title "250-MHz BiCMOS super-high-speed video signal processor (S-VSP) ULSI" @default.
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- W2034105237 doi "https://doi.org/10.1109/4.104179" @default.
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