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- W2034338640 abstract "This paper presents several hardware accelerating methods for an infrared optical tracking system based on FPGA (Field Programmable Gate Array). The system is designed for Image-Guided Surgical Navigation. Since FPGA and SoPC (System on Programming Chip) have the inherent flexibility and ease of implemented, system architecture together with PCB (Printed Circuit Board) design can be greatly simplified while the reliability can be increased. With the hardware accelerating methods, which are Floating-Point Custom Instruction, Tightly Coupled Memory (TCM) and Multiprocessor, calculating speed of 3D reconstruction gets a significant promotion of 18 times according to experiment results. This overcomes the lack of dominant frequency and floating-point computational capability in Altera soft processor Nios II. However, the benefit of speed is obtained at the cost of hardware resources, which should be considered. The hardware acceleration and its testing performance could theoretically support up to 32 markers real-time location with a frame rate of 60fps (frame per second)." @default.
- W2034338640 created "2016-06-24" @default.
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- W2034338640 date "2010-10-01" @default.
- W2034338640 modified "2023-09-25" @default.
- W2034338640 title "Hardware acceleration for motion tracking system used in image-guided surgery" @default.
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- W2034338640 doi "https://doi.org/10.1109/bmei.2010.5639392" @default.
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