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- W2034508851 abstract "In modem VLSI, the degradation of gate oxides caused by implantation became a yield limiting effect. For the investigation of this problem, a test vehicle was developed and effects of implant conditions and device structures on the gate oxide integrity were investigated. Additionally a charge sensor was mounted in the implanter in order to measure the charge-up during implantation. We found that a charge-up sensitive structure should have the following properties: a high ratio of polysilieon on field oxide to polysilicon on gate oxide, a long edge of polysilieon on gate oxide and a large covering of photoresist during implantation. The most significant parameters of implantation in respect to charging were beam current and energy. The use of a floodgun significantly decreased the charging and the number of early gate oxide breakdown." @default.
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- W2034508851 date "1989-04-01" @default.
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- W2034508851 title "Influence of structure process flow and high current implantation on gate oxide degradation" @default.
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- W2034508851 doi "https://doi.org/10.1016/0168-583x(89)90347-9" @default.
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