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- W2034762515 abstract "A backside contact-type ISFET was developed applying a silicon-insulator-silicon (SIS) structure. A round etching procedure for edges of both silicon islands and backside contact wells enabled adequate photoresist mask layers on them, which were essential to the entire chip fabrication process. FETs formed on the chip have flat gate configurations, and they were insulated from each other and also from the side walls of the chip with a silicon dioxide layer. Making the most of this feature, the chips were encapsulated into flat contact type test probes, using a simple cast molding of three different resins. The gate leakage currents for the probes were under 10−11 A, which showed that the insulation of the SIS structure and the encapsulation were satisfactory. The leakage current changes for the probes were checked by elapsing in boiling water. The test results suggested that an ISFET probe, which can be sterilized in boiling water and has mechanical strength, would be available." @default.
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- W2034762515 date "1990-01-01" @default.
- W2034762515 modified "2023-10-03" @default.
- W2034762515 title "A Backside contact ISFET with a silicon-insulator-silicon structure" @default.
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- W2034762515 doi "https://doi.org/10.1016/0925-4005(90)80226-p" @default.
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