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• W2034847082 startingPage "2333" @default.
• W2034847082 abstract "Protecting the confidentiality and integrity of a configuration bitstream is essential for the dynamic partial reconfiguration (DPR) of field-programmable gate arrays (FPGAs). This is because erroneous or falsified bitstreams can cause fatal damage to FPGAs. In this paper, we present a high-speed and area-efficient bitstream protection scheme for DPR systems using the Advanced Encryption Standard with Galois/Counter Mode (AES-GCM), which is an authenticated encryption algorithm. Unlike many previous studies, our bitstream protection scheme also provides a mechanism for error recovery and tamper resistance against configuration block deletion, insertion, and disorder. The implementation and evaluation results show that our DPR scheme achieves a higher performance, in terms of speed and area, than previous methods." @default.
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• W2034847082 date "2013-01-01" @default.
• W2034847082 modified "2023-09-23" @default.
• W2034847082 title "Bitstream Protection in Dynamic Partial Reconfiguration Systems Using Authenticated Encryption" @default.
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• W2034847082 doi "https://doi.org/10.1587/transinf.e96.d.2333" @default.
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