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- W2036447905 abstract "The architecture of a reconfigurable multitransputer machine capable of a gigaflop (10 9 floating point operations per second) performance will be described in some detail. Problems in efficiently coding such a distributed memory MIMD (multiple instruction multiple data) machine are also discussed. These problems will be illustrated with reference to some practical strategies for exploiting different types of parallelism present in many scientific and engineering problems. Some examples will be discussed in detail." @default.
- W2036447905 created "2016-06-24" @default.
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- W2036447905 date "1988-09-26" @default.
- W2036447905 modified "2023-09-27" @default.
- W2036447905 title "Reconfigurable transputer networks: practical concurrent computation" @default.
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- W2036447905 doi "https://doi.org/10.1098/rsta.1988.0095" @default.
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