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• W2037516964 abstract "The cache hierarchy often consumes a large portion of a processor's energy. To save energy in HPC environments, this paper proposes software-controlled reconfiguration of the cache hierarchy with an adaptive runtime system. Our approach addresses the two major limitations associated with other methods that reconfigure the caches: predicting the application's future and finding the best cache hierarchy configuration. Our approach uses formal language theory to express the application's pattern and help predict its future. Furthermore, it uses the prevalent Single Program Multiple Data (SPMD) model of HPC codes to find the best configuration in parallel quickly. Our experiments using cycle-level simulations indicate that 67% of the cache energy can be saved with only a 2.4% performance penalty on average. Moreover, we demonstrate that, for some applications, switching to a software-controlled reconfigurable streaming buffer configuration can improve performance by up to 30% and save 75% of the cache energy." @default.
• W2037516964 created "2016-06-24" @default.
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• W2037516964 date "2014-11-01" @default.
• W2037516964 modified "2023-09-23" @default.
• W2037516964 title "Using an Adaptive HPC Runtime System to Reconfigure the Cache Hierarchy" @default.
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• W2037516964 doi "https://doi.org/10.1109/sc.2014.90" @default.
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