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- W2037921569 abstract "Closed-form formulas are presented for optimum supply voltage (VDD) and threshold voltage (VTH) that minimize power dissipation when technology parameters and required speed are given. The formulas take into account short-channel effects and the variation of VTH and temperature. Using typical device parameters, it is shown that a simple guideline to optimize the power consumption is to set the ratio of maximum leakage power to total power about 30%. Extending the analysis, the future VLSI design trend is discussed. The optimum VDD coincides with the SIA roadmap and the optimum VTH for logic blocks at the highest temperature and at the lowest process variation corner is in the range of 0V~0.1V over generations." @default.
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- W2037921569 date "2000-01-01" @default.
- W2037921569 modified "2023-10-16" @default.
- W2037921569 title "Optimization of VDD and VTH for low-power and high speed applications" @default.
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- W2037921569 doi "https://doi.org/10.1145/368434.368755" @default.
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