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• W2040307946 abstract "A significant improvement in device performance was observed for polycrystalline Si thin-film transistors (poly-Si TFTs) on stainless steel foil subjected to UV treatment prior to the deposition of the buffer layer and gate dielectric film of . This is presumably due to the reduction of the trap-state density in the poly-Si film and at the gate dielectric/poly-Si interface caused by the removal of the organic contamination, which might be induced during the planarization of the rough stainless steel. An excellent subthreshold gate swing of , low threshold voltage of , and very low off-current of , as well as a high field-effect mobility of , were achieved for the p-channel poly-Si TFTs on stainless steel. Thus, it is concluded that poly-Si TFTs on stainless steel can be comparable to those on a conventional glass substrate in terms of their overall device performance, including , , and the off-current." @default.
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• W2040307946 date "2007-01-01" @default.
• W2040307946 modified "2023-09-23" @default.
• W2040307946 title "Improvements in the Device Characteristics of Polycrystalline Silicon Thin-Film Transistors on Stainless Steel by UV Treatment" @default.
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• W2040307946 doi "https://doi.org/10.1149/1.2755673" @default.
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