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- W2040573600 abstract "A fully integrated 1.8 GHz CMOS power amplifier is presented in this paper. The proposed power amplifier consists of a three-stage cascade structure comprising a driver stage, a pre-distortion stage, and a power stage. The pre-distortion stage involves the use of two diode connected MOSFETs as a non-linearity generator to expand the 1dB compression point (P1dB) and enhance the power added efficiency (PAE) performance. The simulation result indicated that the circuit exhibited a power gain of 28.3 dB, an output power at the P1dB of 23.2 dBm, and a PAE of 32% under 3.3V supply. While applying an uplink LTE modulated signal, the amplifier delivers an average output power of 20.5 dBm." @default.
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- W2040573600 date "2014-10-01" @default.
- W2040573600 modified "2023-09-25" @default.
- W2040573600 title "A 23.2 dBm linear power amplifier using pre-distortion technique for LTE applications" @default.
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- W2040573600 doi "https://doi.org/10.1109/icsict.2014.7021472" @default.
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