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- W2041273742 abstract "To meet the standard modern system communication demands, the paper represents the implementation of bidirectional shift converter technique for the embedded converter RS232 to Universal Serial Bus circuit block within FPGA using Verilog HDL language to be applied in a system wireless communication within Zigbee protocol. Utilizing the ModelSim-Altera, RTL model of the shift converter was developed and synthesized then stimulated using TimeQuest Timing Analyzer to observe its functionality." @default.
- W2041273742 created "2016-06-24" @default.
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- W2041273742 date "2012-07-01" @default.
- W2041273742 modified "2023-09-27" @default.
- W2041273742 title "An FPGA implementation of shift converter block technique on FIFO for RS232 to universal serial bus converter" @default.
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- W2041273742 doi "https://doi.org/10.1109/icsgrc.2012.6287165" @default.
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