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- W2042594740 abstract "This paper provides a novel multi mode interleaver which satisfies all the modulation schemes used in 802.16e. The proposed model is finite state machine based address generation with efficient use of FPGA memory block for storing the read and write address. In terms of maximum operating frequency finite state machine based address generation performs better as compared to the existing technique. Proposed design supports computation of interleaver address dynamically." @default.
- W2042594740 created "2016-06-24" @default.
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- W2042594740 date "2014-02-01" @default.
- W2042594740 modified "2023-09-23" @default.
- W2042594740 title "A novel interleaver design for multimode communication in WLAN" @default.
- W2042594740 cites W2111136916 @default.
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- W2042594740 doi "https://doi.org/10.1109/spin.2014.6776964" @default.
- W2042594740 hasPublicationYear "2014" @default.
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