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- W2043968645 abstract "In this paper, we present a design space exploration framework to allow the designer to customize a candidate on-chip interconnect architecture in order to match the application-specific workload in System-on-Chip. To show the benefit of using this methodology, a buffer space allocation algorithm is presented to allow designers to allocate only the required resource for each channel based on the traffic pattern of a target application. Simulations are conducted and results show that the proposed method achieves similar performance compared to the uniformly buffer space allocation method while using only 70% of resources budget." @default.
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- W2043968645 date "2013-07-01" @default.
- W2043968645 modified "2023-09-23" @default.
- W2043968645 title "A buffer size customization approach for application-specific NoC design" @default.
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- W2043968645 doi "https://doi.org/10.1109/hpcsim.2013.6641418" @default.
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