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• W2044042022 abstract "Dependability issues due to nonfunctional properties are emerging as a major cause of faults in modern digital systems. Effective countermeasures have to be developed to properly manage their critical timing effects. This article presents a methodology to avoid transition delay faults in field-programmable gate array (FPGA)-based systems, with low area overhead. The approach is able to exploit temperature information and aging characteristics to minimize the cost in terms of performances degradation and power consumption. The architecture of a hardware manager able to avoid delay faults is presented and analyzed extensively, as well as its integration in the standard implementation design flow." @default.
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• W2044042022 date "2015-03-06" @default.
• W2044042022 modified "2023-09-26" @default.
• W2044042022 title "SATTA" @default.
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• W2044042022 doi "https://doi.org/10.1145/2659001" @default.
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