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• W2047029689 abstract "This paper investigates the positive gate-bias temperature stability of RF-sputtered bottom-gate Mg <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>0.05</sub> Zn <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>0.95</sub> O active-layer thin-film transistors (TFTs) annealed at 200 °C for 5 h and 350 °C for 30 min. Although the TFT devices initially exhibited similar electrical characteristics, the TFTs annealed at 350 °C demonstrated stability characteristics superior to those annealed at 200 °C. This result is due to the improved crystallinity and more stable phase with greater proportion of Zn replaced by Mg in the ZnO crystals. The results also reveal a hump shape in the subthreshold region of the transfer characteristics, which is induced by the positive gate-bias stress at elevated temperatures. The hump phenomenon was suppressed in the TFT annealed at 350 °C. The hump disappeared shortly after removing the positive gate bias, suggesting that this phenomenon was meta-stable and resulted from gate-bias-induced electric field. One possible mechanism responsible for the hump formation in the transfer curve is the gate-field-induced back-channel parasitic transistor. Alternatively, this hump phenomenon might have been due to the creation of meta-stable vacancies in which the neutral defects were thermally excited and released electrons into the active layer to form a leakage path when the TFTs were subjected to gate-bias stress at elevated temperatures." @default.
• W2047029689 created "2016-06-24" @default.
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• W2047029689 date "2012-01-01" @default.
• W2047029689 modified "2023-09-26" @default.
• W2047029689 title "Positive Gate-Bias Temperature Stability of RF-Sputtered $hbox{Mg}_{0.05}hbox{Zn}_{0.95}hbox{O}$ Active-Layer Thin-Film Transistors" @default.
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• W2047029689 doi "https://doi.org/10.1109/ted.2011.2172212" @default.
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