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- W2047784441 abstract "In this paper, a 12-bit 50-MS/s pipeline analog-to-digital converter(ADC) is presented. A digital-adjustable bias current generator scales the opamp bias currents. By this means, the power consumption can be adjustable according to the use. The switched-capicitor comparator is used to improve the sub-ADC' accurrency and minimize the offset. The effective number of bits is 11.3 when a input signal with 2Vp-p signal swing is applied. The ADC is designed in a 0.13-μm CMOS process and consumes 55mW under a 2.5V power supply." @default.
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- W2047784441 date "2010-03-01" @default.
- W2047784441 modified "2023-09-30" @default.
- W2047784441 title "A 12-bit 50MS/s Low-Power Pipeline ADC for WiMAX" @default.
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- W2047784441 doi "https://doi.org/10.1109/icmtma.2010.759" @default.
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