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- W2050022065 abstract "This paper introduces an efficient test access mechanism for advanced microcontroller bus architecture (AMBA) based SoC to reduce the test application time while minimally adding a new test interface logic. Testable design technique is applied to an SoC with the advanced high-performance bus (AHB) and PCI bus bridge by maximally reusing the bridge functions. Testing time can be significantly reduced by increasing the test channels and by shortening the test control protocols. Experimental results show that area overhead and testing times in both functional and structural test modes are considerably reduced." @default.
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- W2050022065 date "2007-10-01" @default.
- W2050022065 modified "2023-09-23" @default.
- W2050022065 title "Design Reuse of on/off-Chip Bus Bridge for Efficient Test Access to AMBA-based SoC" @default.
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- W2050022065 doi "https://doi.org/10.1109/ats.2007.13" @default.
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