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- W2052598982 abstract "Abstract Gate dielectric leakage current becomes a serious concern as the gate oxide thickness of metal–oxide–semiconductor field-effect-transistors is less than 3 nm. This thin oxide can conduct significant leakage current by various tunneling mechanisms and degrade circuit performance. A mathematical method of modeling the gate leakage current I G is presented in this work. Both the shallow trench isolation effect and the source–drain extension effect on I G are included. With suitably chosen transistor dimensions, the parameter extraction can be performed using the devices’ mask drawn size, and the troublesome effective device length and width are not necessary in this model. The extracted parameters and their temperature dependence were used to predict I G of devices with other different dimensions." @default.
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- W2052598982 date "2008-02-01" @default.
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- W2052598982 title "Temperature effect of metal–oxide–semiconductor field-effect-transistors’ gate current evaluated with the mask dimensions" @default.
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- W2052598982 doi "https://doi.org/10.1016/j.sse.2007.09.007" @default.
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