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- W2053625788 abstract "A fabrication process has been developed and characterized to create all-copper chip-to-substrate input/output connections. Electroless copper plating followed by low-temperature annealing in a nitrogen environment was used to create an all-copper bond between copper pillars. The ability to fuse the two copper surfaces at modest temperature and pressure is demonstrated. The bond strength for the all-copper structure exceeded 165 MPa after annealing at 180°C. During the anneal process, a significant microstructural transformation in the bonded copper-copper interface was observed. The changes were correlated to an increase in the bond strength. The process was characterized with respect to in-plane misalignment of bond sites. Significant planar misalignment, greater than the diameter of the pillars, could be tolerated. Through-plane mismatches between the pillars (pillar gap) as large as 65 μm could be overcome, resulting in good pillar-to-pillar bonding. Successful silicon-on-silicon and silicon-on-FR-4 bonding was achieved with no degradation of the organic board." @default.
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- W2053625788 date "2008-01-01" @default.
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- W2053625788 title "All-Copper Chip-to-Substrate Interconnects Part I. Fabrication and Characterization" @default.
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- W2053625788 doi "https://doi.org/10.1149/1.2839007" @default.
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