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- W2054078980 abstract "In this paper a reconfigurable size MDCT accelerator is modeled and synthesized. Starting from the C code of the desired application that cannot run in real time on the given platform (a LEON processor) we isolate the computationally extensive modules of the MDCT to be implemented an accelerator. Because of similarities of their data flow graphs we modify the R2SDF architecture of the FFT and fit it to the MDCT algorithm by adding modules to solve the irregularities in its data flow graphs. The resultant architecture is modular and size-reconfigurable." @default.
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- W2054078980 date "2005-12-01" @default.
- W2054078980 modified "2023-10-02" @default.
- W2054078980 title "HW/SW design and realization of a size-reconfigurable DCT accelerator" @default.
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- W2054078980 doi "https://doi.org/10.1109/icecs.2005.4633437" @default.
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