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- W2055218043 abstract "We demonstrate scaled, replacement gate high-k/metal gate p-channel Ge FinFETs integrated onto 300mm Si wafers for which the best device shows record peak g <inf xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>m, ext</inf> =2.7mS/μm (g <inf xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>m, int</inf> =3.3mS/μm), Q (≡g <inf xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>m, ext</inf> /SS <inf xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>sat</inf> ) = 32.4 and I <inf xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>on</inf> = 497μA/μm at I <inf xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>off</inf> = 100nA/μm, all at V <inf xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>ds</inf> = −0.5V. The high performance is a result of successful integration of <110> oriented, highly scaled Ge fins on silicon substrates and of a low D <inf xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>it</inf> gate stack with capacitance equivalent thickness=8Å. This optimized gate stack supports the highest hole mobility ever reported at sub-10Å CET. Furthermore, Ge FinFETs in the present work outperform any other reported Ge devices by more than ∼2.5× (g <inf xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>m</inf> /SS metric) and ∼2× (I <inf xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>on</inf> /I <inf xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>off</inf> metric) at shortest gate lengths (down to 20nm) to the best of our knowledge." @default.
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- W2055218043 date "2013-12-01" @default.
- W2055218043 modified "2023-10-01" @default.
- W2055218043 title "Scaled p-channel Ge FinFET with optimized gate stack and record performance integrated on 300mm Si wafers" @default.
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- W2055218043 doi "https://doi.org/10.1109/iedm.2013.6724666" @default.
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