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- W2055366660 abstract "We present in this paper the design of a 10 GHz bandwidth low noise active front end interface. This interface uses a common gate amplifier architecture co-designed with the carrier to die bonding wire transition. The carrier to die transition is used to build a low loss third order low pass filter which is used as input matching cell for the common gate amplifier. This Chip-Package interface allows low fabrication cost because it uses standard bonding wires and low silicon area. The proposed Chip-Package interface is used to design a 3.1-10.6 GHz UWB LNA in a 0.13 mum CMOS technology. The simulated results show a return loss greater than 10 dB with a noise figure lower than 4.5 dB in the 3.1-10.6 GHz UWB FCC frequency range with a power consumption of 8.6 mW and a silicon area of 0.2 mm2." @default.
- W2055366660 created "2016-06-24" @default.
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- W2055366660 date "2009-05-01" @default.
- W2055366660 modified "2023-10-18" @default.
- W2055366660 title "Chip-Package co-design of 10 GHz bandwidth low noise active front-end interface" @default.
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- W2055366660 doi "https://doi.org/10.1109/ectc.2009.5074230" @default.
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