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- W2055885281 abstract "In this work, a novel polycrystalline silicon (poly-Si) nanowire thin-film transistor (NW-TFT) with side-gated configuration and a high-k material capping was fabricated and characterized. It was found that the gate fringing field effect via the high-k passivation layer can effectively improve the device performance in terms of higher ON current, larger ON/OFF current ratio, and steeper subthreshold slope (SS). The drain-induced barrier lowering (DIBL) effect is also effectively suppressed owing to better gate control." @default.
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- W2055885281 date "2009-02-20" @default.
- W2055885281 modified "2023-10-18" @default.
- W2055885281 title "Performance Improvement of Polycrystalline Silicon Nanowire Thin-Film Transistors by a High-kCapping Layer" @default.
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- W2055885281 doi "https://doi.org/10.1143/jjap.48.021203" @default.
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